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1.8 V, Micropower, Zero-Drift, Rail-to-Rail Input/Output Op Amp ADA4051-1/ADA4051-2
FEATURES
Very low supply current: 13 A typical Low offset voltage: 15 V maximum Offset voltage drift: 20 nV/C Single-supply operation: 1.8 V to 5.5 V High PSRR: 110 dB minimum High CMRR: 110 dB minimum Rail-to-rail input/output Unity-gain stable Extended industrial temperature range
PIN CONFIGURATION
OUT 1
5
V+
ADA4051-1
V- 2 +IN 3
4
-IN
Figure 1. 5-Lead SOT-23 (RJ-5)
+IN 1
5
V+
ADA4051-1
V- 2 -IN 3
4
OUT
V- 4
5
+IN B
Figure 3. 8-Lead MSOP (RM-8)
OUT A 1 -IN A 2 +IN A 3 V- 4
PIN 1 INDICATOR
8 V+ 7 OUT B 6 -IN B 5 +IN B
ADA4051-2
TOP VIEW (Not to Scale)
08056-001
08056-065
Pressure and position sensors Temperature measurements Electronic scales Medical instrumentation Battery-powered equipment Handheld test equipment
Figure 2. 5-Lead SC-70 (KS-5)
OUT A 1 -IN A 2 +IN A 3
8
V+ OUT B -IN B
ADA4051-2
TOP VIEW (Not to Scale)
7 6
NOTES 1. IT IS RECOMMENDED THAT THE EXPOSED PAD BE CONNECTED TO V-.
Figure 4. 8-Lead LFCSP (CP-8-2)
GENERAL DESCRIPTION
The ADA4051-1/ADA4051-2 are CMOS, micropower, zerodrift operational amplifiers utilizing an innovative chopping technique. These amplifiers feature rail-to-rail input/output swing and extremely low offset voltage while operating from a 1.8 V to 5.5 V power supply. In addition, these amplifiers offer high power supply rejection ratio (PSRR) and common-mode rejection ratio (CMRR) while operating with a typical supply current of 13 A per amplifier. This combination of features makes the ADA4051-1/ADA4051-2 amplifiers ideal choices for battery-powered applications where high precision and low power consumption are important. The ADA4051-1/ADA4051-2 are specified for the extended industrial temperature range of -40C to +125C. The ADA4051-1 amplifier is available in 5-lead SOT-23 and 5-lead SC-70 packages. The ADA4051-2 amplifier is available in 8-lead MSOP and 8-lead LFCSP packages. The ADA4051-1/ADA4051-2 are members of a growing series of zero-drift op amps offered by Analog Devices, Inc. Refer to Table 1 for a list of these devices. Table 1. Op Amps
Supply Single Dual Quad Low Power, 5 V AD8538 AD8539 5V AD8628 AD8629 AD8630 16 V AD8638 AD8639
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009-2010 Analog Devices, Inc. All rights reserved.
08056-066
APPLICATIONS
TOP VIEW (Not to Scale)
08056-064
TOP VIEW (Not to Scale)
ADA4051-1/ADA4051-2 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics--1.8 V Operation ............................ 3 Electrical Characteristics--5 V Operation................................ 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance .......................................................................5 Power Sequencing .........................................................................5 ESD Caution...................................................................................5 Typical Performance Characteristics ..............................................6 Theory of Operation ...................................................................... 15 Input Voltage Range ................................................................... 16 Output Phase Reversal ............................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18
REVISION HISTORY
1/10--Rev. A to Rev. B Added ADA4051-1, 5-Lead SC-70 Package .................... Universal Added Figure 2; Renumbered Sequentially .................................. 1 Changes to Figure 4 and General Description Section ............... 1 Changes to Electrical Characteristics--1.8 V Operation Section and Table 2 ......................................................................................... 3 Changes to Electrical Characteristics--5 V Operation Section and Table 3 ......................................................................................... 4 Changes to Table 5 ............................................................................ 5 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 10/09--Rev. 0 to Rev. A Added ADA4051-1, 5-Lead SOT-23 Package ................. Universal Added ADA4051-2, 8-Lead LFCSP Package .................. Universal Changes to the Features and General Description Section, Added Figure 1 and Figure 3 ........................................................... 1 Moved Electrical Characteristics--1.8 V Operation Section .... 3 Changes to Offset Voltage Parameter and Supply Current per Amplifier Parameter, Table 2 .......................................................... 3 Moved Electrical Characteristics--5 V Operation Section ........ 4 Changes to Offset Voltage Parameter and Supply Current per Amplifier Parameter, Table 2 .......................................................... 4 Changes to Thermal Resistance Section and Table 5................... 5 Changes to Figure 22 and Figure 25 ............................................... 9 Changes to Theory of Operation Section .................................... 15 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 7/09--Revision 0: Initial Version
Rev. B | Page 2 of 20
ADA4051-1/ADA4051-2 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS--1.8 V OPERATION
VSY = 1.8 V, VCM = VSY/2 V, TA = 25C, RL = 100 k to GND, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage ADA4051-2 ADA4051-1 Offset Voltage Drift Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Symbol VOS 0 V VCM 1.8 V 0 V VCM 1.8 V -40C TA +125C -40C TA +125C IOS -40C TA +125C -40C TA +125C 0 V VCM 1.8 V -40C TA +125C RL = 10 k to VCM, 0.1 V VOUT VSY - 0.1 V -40C TA +125C 0 105 100 106 100 8 2 5 RL = 100 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 100 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C VOUT = VSY or GND f = 1 kHz, G = 10 1.8 V VSY 5.5 V -40C TA +125C VOUT = VSY/2 VOUT = VSY/2 -40C TA +125C SR+ SR- tS GBP M CS en p-p en in RL = 10 k, CL = 100 pF, G = 1 RL = 10 k, CL = 100 pF, G = 1 To 0.1%, VIN = 1 V p-p, RL = 10 k, CL = 100 pF CL = 100 pF, G = 1 CL = 100 pF, G = 1 VIN = 1.7 V, f = 100 Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
Rev. B | Page 3 of 20
Test Conditions/Comments
Min
Typ
Max
Unit
VOS/T IB
2 2 0.02 5 10
15 17 0.1 50 200 100 150 1.8
CMRR AVO
125 130
V V V/C pA pA pA pA V dB dB dB dB M pF pF V V V V mV mV mV mV mA dB dB
Input Resistance Input Capacitance, Differential Mode Input Capacitance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High
RIN CINDM CINCM VOH 1.796 1.79 1.76 1.7
1.799 1.796 1 3 13 1 3 9 20 40
Output Voltage Low
VOL
Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier ADA4051-2 ADA4051-1 DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISC ZOUT PSRR ISY
110 106
135
13 15
17 18 20
A A A V/s V/s s kHz Degrees dB V p-p nV/Hz fA/Hz
0.04 0.03 120 115 40 140 1.96 95 100
ADA4051-1/ADA4051-2
ELECTRICAL CHARACTERISTICS--5 V OPERATION
VSY = 5.0 V, VCM = VSY/2 V, TA = 25C, RL = 100 k to GND, unless otherwise noted. Table 3.
Parameter INPUT CHARACTERISTICS Offset Voltage ADA4051-2 ADA4051-1 Offset Voltage Drift Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Symbol VOS 0 V VCM 5 V 0 V VCM 5 V -40C TA +125C -40C TA +125C IOS -40C TA +125C -40C TA +125C 0 V VCM 5 V -40C TA +125C RL = 10 k to VCM, 0.1 V VOUT VSY - 0.1 V -40C TA +125C 0 110 106 115 106 8 2 5 RL = 100 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 100 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C VOUT = VSY or GND f = 1 kHz, G = 10 1.8 V VSY 5.5 V -40C TA +125C VOUT = VSY/2 VOUT = VSY/2 -40C TA +125C SR+ SR- tS GBP M CS en p-p en in RL = 10 k, CL = 100 pF, G = 1 RL = 10 k, CL = 100 pF, G = 1 To 0.1%, VIN = 1 V p-p, RL = 10 k, CL = 100 pF CL = 100 pF, G = 1 CL = 100 pF, G = 1 VIN = 4.99 V, f = 100 Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 4.996 4.985 4.96 4.9 4.998 4.99 1 9 15 1 110 106 135 4 13 30 90 40 2 2 0.02 20 15 17 0.1 70 200 100 150 5 V V V/C pA pA pA pA V dB dB dB dB M pF pF V V V V mV mV mV mV mA dB dB 17 18 20 A A A V/s V/s s kHz Degrees dB V p-p nV/Hz fA/Hz Test Conditions/Comments Min Typ Max Unit
VOS/T IB
CMRR AVO
135 135
Input Resistance Input Capacitance, Differential Mode Input Capacitance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High
RIN CINDM CINCM VOH
Output Voltage Low
VOL
Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier ADA4051-2 ADA4051-1 DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISC ZOUT PSRR ISY
13 15
0.06 0.04 110 125 40 140 1.96 95 100
Rev. B | Page 4 of 20
ADA4051-1/ADA4051-2 ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage2 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec)
1
THERMAL RESISTANCE
Rating 6V VSY 0.3 V 10 mA VSY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
JA is specified for the worst-case conditions, that is, a device soldered on a circuit board for surface-mount packages with its exposed paddle soldered to a pad, if applicable. Table 5 shows simulated thermal values for a 4-layer (2S2P) JEDEC standard thermal test board, unless otherwise specified. Table 5. Thermal Resistance
Package Type 5-Lead SOT-23 (RJ-5) 5-Lead SC-70 (KS-5) 8-Lead MSOP (RM-8) 8-Lead LFCSP (CP-8-2) JA 190 534 142 77 JC 92 173 45 14 Unit C/W C/W C/W C/W
The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. 2 Inputs are protected against high differential voltages by internal series 1.33 k resistors and back-to-back diode-connected N-MOSFETs (with a typical VT of 0.7 V for VCM of 0 V).
POWER SEQUENCING
The op amp supplies must be established simultaneously with or before any input signals are applied. If this is not possible, the input current must be limited to 10 mA.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. B | Page 5 of 20
ADA4051-1/ADA4051-2 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted.
300 VSY = 1.8V VCM = VSY/2 250 NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
300
VSY = 5V VCM = VSY/2
250
200
200
150
150
100
100
50
50
VOS (V)
VOS (V)
Figure 5. Input Offset Voltage Distribution
Figure 8. Input Offset Voltage Distribution
10
VSY = 1.8V -40C TA +125C
8
VSY = 5V -40C TA 125C
8
NUMBER OF AMPLIFIERS
6
NUMBER OF AMPLIFIERS
6
4
4
2
2
0
08056-003
TCVOS (V/C)
TCVOS (V/C)
Figure 6. Input Offset Voltage Drift Distribution with Temperature
Figure 9. Input Offset Voltage Drift Distribution with Temperature
15 VSY = 1.8V 10
15 VSY = 5V 10
5
5
VOS (V)
VOS (V)
0 DEVICE 1 DEVICE 2 DEVICE 3 DEVICE 4 DEVICE 5 DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE 10
08056-004
0 DEVICE 1 DEVICE 2 DEVICE 3 DEVICE 4 DEVICE 5 DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE 10
08056-007
-5
-5
-10
-10
-15
0
0.3
0.6
0.9 VCM (V)
1.2
1.5
1.8
-15
0
1
2 VCM (V)
3
4
5
Figure 7. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 10. Input Offset Voltage vs. Input Common-Mode Voltage
Rev. B | Page 6 of 20
08056-006
0
0.01 0.02 0.03 0.04 0.05
0.06 0.07 0.08 0.09 0.10
0
0
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
08056-005
-10
-8
-6
-4
-2
0
2
4
6
8
10
08056-002
0
0
-10
-8
-6
-4
-2
0
2
4
6
8
10
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
100
VSY = 1.8V IB+ IB-
100
VSY = 5V IB+ IB-
80
80
60
60 IB (pA)
08056-008
IB (pA)
40
40
20
20
0
0
25
50
75 TEMPERATURE (C)
100
125
25
50
75 TEMPERATURE (C)
100
125
Figure 11. Input Bias Current vs. Temperature
Figure 14. Input Bias Current vs. Temperature
200 150 100 50
VSY = 1.8V
400 300 200 100
IB (pA)
VSY = 5V
IB (pA)
0 -50 -100 -150 -200 IB+, 25C IB-, 25C IB+, 85C IB-, 85C IB+, 125C IB-, 125C
08056-009
0 -100 -200 -300 -400
IB+, 25C IB-, 25C IB+, 85C IB-, 85C IB+, 125C IB-, 125C
08056-012
08056-013
0
0.3
0.6
0.9 VCM (V)
1.2
1.5
1.8
0
0.5
1.0
1.5
2.0
2.5 VCM (V)
3.0
3.5
4.0
4.5
5.0
Figure 12. Input Bias Current vs. Common-Mode Voltage and Temperature
Figure 15. Input Bias Current vs. Common-Mode Voltage and Temperature
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
10,000
VSY = 1.8V
10,000
VSY = 5V
1000
1000
100
100
10
10
1
1
0.1
0.01
0.1 LOAD CURRENT (mA)
1
10
08056-010
0.01 0.001
-40C +25C +85C +125C
0.1
0.01 0.001
-40C +25C +85C +125C
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 13. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature
Figure 16. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature
Rev. B | Page 7 of 20
08056-011
-20
-20
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV) OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
10,000
VSY = 1.8V
10,000
VSY = 5V
1000
1000
100
100
10
10
1
1
0.1
0.01
0.1
1
10
100
08056-014
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 17. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature
Figure 20. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature
1800 RL = 100k OUTPUT VOLTAGE [VOH] (mV)
5000 4998 4996 4994 4992 4990 4988 4986 4984
08056-015
RL = 100k
1799
OUTPUT VOLTAGE [VOH] (mV)
1798
1797
RL = 10k
RL = 10k
1796
1795 VSY = 1.8V VCM = VSY/2 -25 -10 5 20 35 50 65 80 95 110 125 VSY = 5V VCM = VSY/2 4982 -40 -25 -10
5
20
35
50
65
80
95
110
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 18. Output Voltage (VOH) vs. Temperature
Figure 21. Output Voltage (VOH) vs. Temperature
14 12
OUTPUT VOLTAGE [VOL] (mV)
VSY = 1.8V VCM = VSY/2
OUTPUT VOLTAGE [VOL] (mV)
14 12 10 8 6 4 2 RL = 100k
08056-016
VSY = 5V VCM = VSY/2
10 8 6 4 2 0 -40
RL = 10k
RL = 10k
RL = 100k -25 -10 5 20 35 50 65 80 95 110 125
08056-019
-25
-10
5
20
35
50
65
80
95
110
125
0 -40
TEMPERATURE (C)
TEMPERATURE (C)
Figure 19. Output Voltage (VOL) vs. Temperature
Figure 22. Output Voltage (VOL) vs. Temperature
Rev. B | Page 8 of 20
08056-018
1794 -40
08056-017
0.01 0.001
-40C +25C +85C +125C
0.1
0.01 0.001
-40C +25C +85C +125C
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
30
ADA4051-2 ADA4051-1
30
VCM = VSY/2
25
TOTAL SUPPLY CURRENT (A)
TOTAL SUPPLY CURRENT (A)
25
20
20
15
15
10
10
ADA4051-2, ADA4051-2, ADA4051-1, ADA4051-1, -25 -10 5 20 35 50 65 80 95 1.8V 5V 1.8V 5V 110 125
08056-023
5
VCM = VSY/2 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
08056-020
5
0
0 -40
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
Figure 23. Total Supply Current vs. Supply Voltage
Figure 26. Total Supply Current vs. Temperature
80 60 VSY = 1.8V CL= 100pF
180 135
80 60
OPEN-LOOP GAIN (dB)
180 VSY = 5V CL= 100pF 135 90 PHASE GAIN 45 0 -45 -90 -135
08056-025 08056-062
OPEN-LOOP GAIN (dB)
40 20 GAIN 0 -20 -40 -60 100 PHASE
90
40 20 0 -20 -40 -60 100
45 0 -45 -90 -135
PHASE (Degrees)
08056-022
1k
10k FREQUENCY (Hz)
100k
1M
1k
10k FREQUENCY (Hz)
100k
1M
Figure 24. Open-Loop Gain and Phase vs. Frequency
Figure 27. Open-Loop Gain and Phase vs. Frequency
50 40 30 CLOSED-LOOP GAIN (dB)
50 VSY = 1.8V RL = 10k CL = 50pF 40 30
VSY = 5V RL = 10k CL = 50pF
CLOSED-LOOP GAIN (dB)
20 10 0 -10 -20 -30 -40 -50 100 G=1 G = 10 G = 100
08056-061
20 10 0 -10 -20 -30 -40 G=1 G = 10 G = 100 1k 10k FREQUENCY (Hz) 100k 1M
1k
10k FREQUENCY (Hz)
100k
1M
-50 100
Figure 25. Closed-Loop Gain vs. Frequency
Figure 28. Closed-Loop Gain vs. Frequency
Rev. B | Page 9 of 20
PHASE (Degrees)
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
10k
VSY = 1.8V
10k
VSY = 5V
1k
1k
ZOUT ()
10
ZOUT ()
G = -1 G = -10 G = -100 10k 100k 1M
08056-026
100
100
10
1
1 G = -1 G = -10 G = -100 10k 100k 1M
08056-029 08056-031 08056-030
0.1 1k
0.1 1k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 29. Output Impedance vs. Frequency
Figure 32. Output Impedance vs. Frequency
110
VSY = 1.8V
110 VSY = 5V 100 90
100 90
CMRR (dB)
80 70 60 50 40 10
CMRR (dB)
80 70 60 50 40 10
100
1k
10k
100k
1M
08056-027
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 30. CMRR vs. Frequency
Figure 33. CMRR vs. Frequency
120 VSY = 1.8V 100
120 VSY = 5V 100
80
80
PSRR (dB)
60 PSRR+ 40
PSRR (dB)
60 PSRR+ 40
20 PSRR- 1k 10k FREQUENCY (Hz) 100k 1M
08056-028
20 PSRR- 0 100 1k 10k FREQUENCY (Hz) 100k 1M
0 100
Figure 31. PSRR vs. Frequency
Figure 34. PSRR vs. Frequency
Rev. B | Page 10 of 20
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
60
VSY = 0.9V VIN = 50mV p-p RL = 10k CL= 50pF
60
VSY = 2.5V VIN = 50mV p-p RL = 10k CL= 50pF
50
50
OVERSHOOT (%)
OVERSHOOT (%)
40
40
-OVERSHOOT
30
30
20
-OVERSHOOT +OVERSHOOT
20
+OVERSHOOT
10
10
08056-032
100
LOAD CAPACITANCE (pF)
100
LOAD CAPACITANCE (pF)
Figure 35. Small-Signal Overshoot vs. Load Capacitance
Figure 38. Small-Signal Overshoot vs. Load Capacitance
VSY = 1.8V RL = 10k CL = 100pF G=1 VIN = 1.5V p-p
VOLTAGE (500mV/DIV)
VSY = 5V RL = 10k CL = 100pF G=1 VIN = 4V p-p
VOLTAGE (1V/DIV)
08056-033
TIME (100s/DIV)
TIME (100s/DIV)
Figure 36. Large-Signal Transient Response
Figure 39. Large-Signal Transient Response
VSY = 1.8V RL = 10k CL = 100pF G=1 VIN = 50mV p-p
VSY = 5V RL = 10k CL = 100pF G=1 VIN = 50mV p-p
VOLTAGE (10mV/DIV)
VOLTAGE (10mV/DIV)
08056-034
TIME (100s/DIV)
TIME (100s/DIV)
Figure 37. Small-Signal Transient Response
Figure 40. Small-Signal Transient Response
Rev. B | Page 11 of 20
08056-037
08056-036
08056-035
0 10
0 10
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
VSY = 1.8V
INPUT VOLTAGE NOISE (0.5V/DIV)
INPUT VOLTAGE NOISE (0.5V/DIV)
VSY = 5V
1.94V p-p
1.96V p-p
08056-038
TIME (4s/DIV)
TIME (4s/DIV)
Figure 41. Input Voltage Noise, 0.1 Hz to 10 Hz
1k
1k
Figure 44. Input Voltage Noise, 0.1 Hz to 10 Hz
VSY = 1.8V
VOLTAGE NOISE DENSITY (nV/Hz)
VSY = 5V
VOLTAGE NOISE DENSITY (nV/Hz)
100
100
10
10
100 FREQUENCY (Hz)
1k
10k
100 FREQUENCY (Hz)
1k
10k
Figure 42. Voltage Noise Density vs. Frequency
0.15 0.10 VSY = 0.9V G = -10
Figure 45. Voltage Noise Density vs. Frequency
0.4 0.3
INPUT VOLTAGE (100mV/DIV)
VSY = 2.5V G = -10
OUTPUT VOLTAGE (1V/DIV)
08056-043
0.05 INPUT VOLTAGE 0 -0.05 OUTPUT VOLTAGE 0.5 0 -0.5 -1.0 -1.5
OUTPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE (50mV/DIV)
0.2 0.1 0 -0.1 INPUT VOLTAGE OUTPUT VOLTAGE 1 0 -1 -2
08056-040
TIME (40s/DIV)
TIME (40s/DIV)
-3
Figure 43. Positive Overload Recovery
Figure 46. Positive Overload Recovery
Rev. B | Page 12 of 20
08056-042
08056-039
1 10
1 10
08056-041
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
0.05 0 INPUT VOLTAGE
0.1 0
OUTPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE (100mV/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE (1V/DIV)
INPUT VOLTAGE (50mV/DIV)
-0.05 -0.10 -0.15 1.5 1.0 0.5 OUTPUT VOLTAGE VSY = 0.9V G = -10 TIME (40s/DIV) 0
-0.1 -0.2 -0.3 -0.4 4 3 2 1 OUTPUT VOLTAGE 0 -1
-0.5
08056-044
TIME (40s/DIV)
Figure 47. Negative Overload Recovery
Figure 50. Negative Overload Recovery
INPUT VOLTAGE
INPUT VOLTAGE
OUTPUT VOLTAGE (5mV/DIV)
5 ERROR BAND OUTPUT VOLTAGE 0 -5 VSY = 0.9V VIN = 1V p-p RL = 10k CL = 100pF TIME (40s/DIV)
5 ERROR BAND OUTPUT VOLTAGE 0 -5
08056-045
TIME (40s/DIV)
Figure 48. Positive Settling Time to 0.1%
Figure 51. Positive Settling Time to 0.1%
OUTPUT VOLTAGE (5mV/DIV)
INPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE
INPUT VOLTAGE
5 ERROR BAND OUTPUT VOLTAGE 0 -5 VSY = 0.9V VIN = 1V p-p RL = 10k CL = 100pF TIME (40s/DIV)
5 ERROR BAND OUTPUT VOLTAGE 0 -5 VSY = 2.5V VIN = 1V p-p RL = 10k CL = 100pF TIME (40s/DIV)
08056-046
OUTPUT VOLTAGE (5mV/DIV)
08056-049
Figure 49. Negative Settling Time to 0.1%
INPUT VOLTAGE (500mV/DIV)
Figure 52. Negative Settling Time to 0.1%
Rev. B | Page 13 of 20
08056-048
VSY = 2.5V VIN = 1V p-p RL = 10k CL = 100pF
OUTPUT VOLTAGE (5mV/DIV)
INPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE (500mV/DIV)
08056-047
VSY = 2.5V G = -10
ADA4051-1/ADA4051-2
TA = 25C, unless otherwise noted.
-100
-100
100k 1k VIN = 0.5V VIN = 1V VIN = 1.7V
100k 1k
CHANNEL SEPARATION (dB)
VIN = 1V VIN = 3V VIN = 4.99V
CHANNEL SEPARATION (dB)
-110
-110
-120
-120
-130
-130
-140
200
2k
FREQUENCY (Hz)
20k
08056-050
200
2k FREQUENCY (Hz)
20k
Figure 53. Channel Separation vs. Frequency
Figure 56. Channel Separation vs. Frequency
1.8
6
1.5
5
OUTPUT SWING (V)
OUTPUT SWING (V)
1.2
4
0.9
3
0.6 VSY = 1.8V VIN = 1.7V G=1 RL= 10k CL = 50pF 1k 10k FREQUENCY (Hz) 100k
08056-051
2 VSY = 5V VIN = 4.9V G=1 RL= 10k CL = 50pF 1k 10k FREQUENCY (Hz) 100k
08056-054
0.3
1
0 100
0 100
Figure 54. Output Swing vs. Frequency
Figure 57. Output Swing vs. Frequency
VSY = 0.9V G=1 RL= NO LOAD CL = NO LOAD
VSY = 2.5V G=1 RL= NO LOAD CL = NO LOAD
VOLTAGE (500mV/DIV)
VOUT VIN
08056-052
VOLTAGE (1V/DIV)
VOUT VIN
TIME (200s/DIV)
TIME (200s/DIV)
Figure 55. No Phase Reversal
Figure 58. No Phase Reversal
Rev. B | Page 14 of 20
08056-055
08056-053
-150 20
VSY = 1.8V G = -100 RL= 10k CL= 50pF
-140
-150 20
VSY = 5V G = -100 RL= 10k CL = 50pF
ADA4051-1/ADA4051-2 THEORY OF OPERATION
The ADA4051-1/ADA4051-2 micropower chopper operational amplifiers feature a novel, patent-pending technique that suppresses offset-related ripple in a chopper amplifier. Instead of filtering the ripple in the ac domain, this technique nulls the amplifier's initial offset in the dc domain, thus preventing ripple at the overall output. Auto-zeroing and chopping are two techniques widely used in high precision CMOS amplifiers to achieve low offset, low offset drift, and no 1/f noise. Each of these techniques has pros and cons. Auto-zeroing results in more in-band noise due to aliasing introduced by sampling. On the other hand, chopping produces offset-related ripple because it modulates the initial offset associated with the amplifier up to its chopping frequency. To accomplish the best noise vs. power trade-off, the chopping technique is the better approach when designing a low offset amplifier because there is no increased in-band noise. It is preferable to suppress the offset-related ripple inside a chopper amplifier because the offset-related ripple would otherwise need to be eliminated by an extra off-chip postfilter. Figure 59 shows the block diagram design of the ADA4051-1/ ADA4051-2 chopper amplifiers employing a local feedback loop called autocorrection feedback (ACFB). The main signal path contains an input chopping switch network (CHOP1), a first transconductance amplifier (Gm1), an output chopping switch network (CHOP2), a second transconductance amplifier (Gm2), and a third transconductance amplifier (Gm3). CHOP1 and CHOP2 operate at 40 kHz of chopping frequency to modulate the initial offset and 1/f noise from Gm1 up to the chopping frequency. A fourth transconductance amplifier (Gm4) in the ACFB senses the modulated ripple at the output of CHOP2, caused by the initial offset voltage of Gm1. Then, the ripple is demodulated down to a dc domain through a third chopping switch network (CHOP3), operating with the same chopping clock as CHOP1 and CHOP2. Finally, a null transconductance amplifier (Gm5) tries to null any dc component at the output of Gm1 that would otherwise appear in the overall output as ripple. A switched-capacitor notch filter (NF) functions to selectively suppress the undesired offset-related ripple without disturbing the desired input signal from the overall input. The desired input dc signal appears as a dc signal at the output of CHOP2. Then, the initial offset is modulated up to the chopping frequency by CHOP3 and filtered out by the NF. Therefore, initial offset does not create any feedback and does not disturb the desired input signal. The NF is synchronized with the chopping clock to filter out the modulated component. In the same manner, the offset of Gm5 is filtered out by the combination of CHOP3 and the NF, enabling accurate ripple sensing at the output of CHOP2. In parallel with the high dc gain path, a feedforward transconductance amplifier (Gm6) is added to bypass the phase shift introduced by the ACFB at the chopping frequency. Gm6 is designed to have the same transconductance as Gm1 to avoid pole-zero doublets. This design prevents any instability introduced by the ACFB in the overall feedback loop.
CHOP1 +IN -IN C3 C1 Gm1 CHOP2 C2 Gm3 OUT
Gm2
Gm5 Gm6 (= Gm1)
NF CHOP3 Gm4
Figure 59. ADA4051-1/ADA4051-2 Chopper Amplifiers Block Diagram
The voltage noise density, which is equal to the thermal noise floor dominated by the Gm1, is essentially flat from dc to the chopping frequency because CHOP1 and CHOP2 eliminate the 1/f noise generated in Gm1 and the ACFB does not contribute any additional noise. Although the ACFB suppresses the ripple related to the chopping, there is a remaining voltage ripple. To further suppress the remaining ripple down to a desired level, it is recommended to have a postfilter at the output of the amplifier. The remaining voltage ripple originates from two sources. The first type of ripple is due to the residual ripple associated with the initial offset of the Gm1. It is proportional to the magnitude of the initial offset and creates a spectrum at the chopping frequency (fCHOP). When the amplifier is configured as a unitygain buffer, this ripple has a typical value of 4.9 V rms and a maximum of 34.7 V rms. The second type of ripple is due to the intermodulation between the high frequency input signal and the chopping frequency. This ripple depends on the input frequency (fIN) and creates a spectrum at frequencies equal to the difference between the chopping frequency and the input frequency (fCHOP - fIN), as well as at frequencies equal to the summation of the chopping frequency and the input frequency (fCHOP + fIN). The magnitude of the ripple for different input frequencies is shown in Figure 60.
500
MODULATED OUTPUT RIPPLE (V rms)
400
300
200
100
0
1
2
3
4
5
6
7
8
9
10
INPUT FREQUENCY (kHz)
Figure 60. ADA4051-1/ADA4051-2 Modulated Output Ripple vs. Input Frequency
Rev. B | Page 15 of 20
08056-063
0
08056-060
ADA4051-1/ADA4051-2
The design architecture of the ADA4051-1/ADA4051-2 specifically targets precision signal conditioning applications requiring accurate and stable performance from dc to 10 Hz bandwidth. In summary, the main features of the ADA4051-1/ ADA4051-2 chopper amplifiers are * * Considerable suppression of the offset-related ripple No affect on the desired input signal as long as its frequency is much lower than the chopping frequency shown in Figure 60 Achievement of low offset similar to a conventional chopper amplifier No introduction of excess noise The ADA4051-1/ADA4051-2 also have internal circuitry that protects the input stage from high differential voltages. This circuitry is composed of internal 1.33 k resistors in series with each input and back-to-back diode-connected N-MOSFET (with a typical VT of 0.7 V for a VCM of 0 V) after these series resistors. With normal negative feedback operating conditions, the ADA4051-1/ ADA4051-2 amplifiers correct their output to ensure that the two inputs are at the same voltage. However, if the device is configured as a comparator or there are unusual operating conditions, the input voltages can be forced to different potentials, which may cause excessive current to flow through the internal diodeconnected N-MOSFETs. Although the ADA4051-1/ADA4051-2 are rail-to-rail input amplifiers, take care to ensure that the potential difference between the inputs does not exceed VSY to avert permanent damage to the device.
* *
The ADA4051-1/ADA4051-2 chopper amplifiers provide a railto-rail input range with a 1.8 V to 5.5 V supply voltage range and 20 A supply current consumption over the -40C to +125C extended industrial temperature range. The gain bandwidth is 125 kHz as a unity-gain stable amplifier up to 100 pF load capacitance.
OUTPUT PHASE REVERSAL
Although output phase reversal can occur with other amplifiers when the input common-mode voltage range is exceeded, the ADA4051-1/ADA4051-2 amplifiers are designed to prevent any output phase reversal, provided both inputs are maintained approximately within 0.3 V above and below the supply voltages (VSY 0.3 V). With other amplifiers, the outputs may jump in the opposite direction to the supply rail when a common-mode voltage moves outside the common-mode range. This usually occurs when one of the internal stages of the amplifier no longer has sufficient bias voltage across it and subsequently turns off. However, with the ADA4051-1/ADA4051-2 amplifiers, if one or both inputs exceed the input voltage range but remain within the VSY 0.3 V range, an internal loop opens and the output remains in saturation mode, without phase reversal, until the input voltage is brought back to within the input voltage range limits as shown in Figure 55 and Figure 58.
INPUT VOLTAGE RANGE
The ADA4051-1/ADA4051-2 have internal ESD protection diodes. These diodes are connected between the inputs and each supply rail to protect the input MOSFETs from an electrical discharge event and are reversed-biased during normal operation. This protection scheme allows voltages as high as approximately 0.3 V beyond the supplies (VSY 0.3 V) to be applied at the input of either terminal without causing permanent damage. If either input exceeds one of the supply rails by more than 0.3 V, these ESD diodes become forward-biased and large amounts of current begin to flow through them. Without current limiting, this excessive current would cause permanent damage to the device. If the inputs are expected to be subject to overvoltage conditions, install a resistor in series with each input to limit the input current to 10 mA maximum.
Rev. B | Page 16 of 20
ADA4051-1/ADA4051-2 OUTLINE DIMENSIONS
3.00 2.90 2.80
1.70 1.60 1.50
5
4
3.00 2.80 2.60
1
2
3
0.95 BSC 1.90 BSC 1.30 1.15 0.90
1.45 MAX 0.95 MIN
0.20 MAX 0.08 MIN 10 5 0 0.55 0.45 0.35
121608-A
0.15 MAX 0.05 MIN
0.50 MAX 0.35 MIN
SEATING PLANE
0.20 BSC
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 61. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters
2.20 2.00 1.80 1.35 1.25 1.15 2.40 2.10 1.80
5 1 2
4 3
0.65 BSC 1.00 0.90 0.70 1.10 0.80 0.40 0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 62. 5-Lead Thin Shrink Small Outline Transistor Package [SC-70] (KS-5) Dimensions shown in millimeters
Rev. B | Page 17 of 20
072809-A
0.10 MAX COPLANARITY 0.10
0.30 0.15
SEATING PLANE
0.22 0.08
0.46 0.36 0.26
ADA4051-1/ADA4051-2
3.20 3.00 2.80
3.20 3.00 2.80 PIN 1 IDENTIFIER
8
5
1
5.15 4.90 4.65
4
0.65 BSC 0.95 0.85 0.75 0.15 0.05 COPLANARITY 0.10 0.40 0.25 15 MAX 1.10 MAX 0.23 0.09 0.80 0.55 0.40
100709-B
6 0
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 63. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
3.25 3.00 SQ 2.75
0.60 MAX 0.60 MAX
5 8
0.50 BSC
PIN 1 INDICATOR
TOP VIEW
2.95 2.75 SQ 2.55
EXPOSED PAD
(BOT TOM VIEW)
1.60 1.45 1.30 PIN 1 INDICATOR
4
1
0.90 MAX 0.85 NOM SEATING PLANE
12 MAX
0.70 MAX 0.65 TYP
0.50 0.40 0.30 0.05 MAX 0.01 NOM
1.89 1.74 1.59
Figure 64. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm x 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters
ORDERING GUIDE
Model 1 ADA4051-1ARJZ-R2 ADA4051-1ARJZ-R7 ADA4051-1ARJZ-RL ADA4051-1AKSZ-R2 ADA4051-1AKSZ-R7 ADA4051-1AKSZ-RL ADA4051-2ACPZ-R2 ADA4051-2ACPZ-R7 ADA4051-2ACPZ-RL ADA4051-2ARMZ ADA4051-2ARMZ-R7 ADA4051-2ARMZ-RL
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SC-70 5-Lead SC-70 5-Lead SC-70 8-Lead LFCSP_VD 8-Lead LFCSP_VD 8-Lead LFCSP_VD 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP
Package Option RJ-5 RJ-5 RJ-5 KS-5 KS-5 KS-5 CP-8-2 CP-8-2 CP-8-2 RM-8 RM-8 RM-8
090308-B
0.30 0.23 0.18
0.20 REF
FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
Branding A0U A0U A0U A0U A0U A0U A2M A2M A2M A2M A2M A2M
Z = RoHS Compliant Part.
Rev. B | Page 18 of 20
ADA4051-1/ADA4051-2 NOTES
Rev. B | Page 19 of 20
ADA4051-1/ADA4051-2 NOTES
(c)2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08056-0-1/10(B)
Rev. B | Page 20 of 20

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